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 19-2327; Rev 1; 7/02
LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators
General Description
The MAX9360/MAX9361 are low-skew, single LVTTL/ TTL/CMOS-to-differential LVECL/ECL translators designed for high-speed signal and clock driver applications. For interfacing to LVTTL/TTL/CMOS input signals, these devices operate over a 3.0V to 5.5V supply range, allowing high-performance clock or data distribution. For interfacing to differential LVECL/ECL output signals, these devices operate from a -2.375V to -5.5V supply. The MAX9360 is a 3.3V LVTTL/CMOS-to-LVECL/ECL translator that operates at a typical speed of 3GHz. The MAX9361 is a 5V TTL/CMOS-to-LVECL/ECL translator that operates at a typical speed of 1.3GHz. Both devices can be used to drive either LVECL devices or standard ECL devices with a negative supply range of -2.375V to -5.5V. The devices default to high if the input is disconnected, and feature ultra-low propagation delay: 440ps for the MAX9360, 810ps for the MAX9361. The MAX9360 is specified for operation from -40C to +85C in an 8-pin SO package, and 0C to +85C in a space-saving, 8-pin SOT23 package. The MAX9361 is specified for operation from -40C to +85C for both 8-pin SO and SOT23 packages. o Output High with Input Open o -2.375V to -5.5V LVECL/ECL Operation o ESD Protection >2kV (Human Body Model) o 3.0V to 3.6V LVTTL/CMOS Operation (MAX9360) Improved Second Source of the MC100EPT24 Low 13.8mA (typ) IEE Supply Current 440ps (typ) Propagation Delay >300mV Output at 1GHz o 4.5V to 5.5V TTL Operation (MAX9361) Improved Second Source of the MC100ELT24 Low 6.6mA (typ) IEE Supply Current 600ps (typ) Propagation Delay >300mV Output at 250MHz
Features
MAX9360/MAX9361
Ordering Information
PART MAX9360EKA-T MAX9360ESA MAX9361EKA-T MAX9361ESA TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C PINPACKAGE 8 SOT23-8 8 SO 8 SOT23-8 8 SO TOP MARK AAJI -- AAJJ --
Applications
Clock/Data-Level Translation
Pin Configurations
TOP VIEW
D1 VEE 2 N.C. 8 7 GND VEE 1 D2 8 7 VCC Q
Q Q
3
6
N.C.
3
6
Q
N.C. 4
MAX9360/ MAX9361 SOT23
5
VCC
N.C. 4
MAX9360/ MAX9361 SO
5
GND
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators MAX9360/MAX9361
ABSOLUTE MAXIMUM RATINGS
VCC to GND ..............................................................-0.3V to +6V VEE to GND...............................................................-6V to +0.3V D to GND ....................................................-0.3V to (VCC + 0.3V) Continuous Output Current ................................................50mA Surge Output Current........................................................100mA Junction-to-Ambient Thermal Resistance in Still Air 8-Pin SOT23.............................................................+112C/W 8-Pin SO...................................................................+170C/W Junction-to-Ambient Thermal Resistance with 500LFPM Airflow 8-Pin SOT23...............................................................+78C/W 8-Pin SO.....................................................................+99C/W Junction-to-Case Thermal Resistance 8-Pin SOT23...............................................................+80C/W 8-Pin SO..................................................................+40C/mW Continuous Power Dissipation (TA = +70C) 8-Pin SOT23 (derate 8.9mW/C above +70C)............714mW 8-Pin SO (derate 5.9mW/C above +70C)..................470mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-60C to +150C ESD Protection Human Body Model (D, Q, Q).........................................>2kV Soldering Temperature (10s) ...........................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS--MAX9360
(VCC = 3.0V to 3.6V, VEE = -2.375V to -5.5V, GND = 0, outputs terminated with 50 1% to -2.0V. Typical values are at VCC = 3.3V, VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Notes 1, 2, 3)
0C (SOT23) -40C (SO) MIN LVTTL INPUT (D) Input High Current Input Low Current Input Clamp Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Differential Output Swing (VOH - VOL) Power-Supply Current Internal Chip Current IIH IIL VIK VIH VIL VIN = 2.7V VIN = VCC VIN = 0.5V IIN = -18mA -20 -10 -200 -1.2 2.0 0.8 -51 +20 +10 -20 -10 -200 -1.2 2.0 0.8 -60 +20 +10 -20 -10 -200 -1.2 2.0 0.8 -67 +20 +10 A A V V V TYP MAX MIN +25C TYP MAX MIN +85C TYP MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
LVECL/ECL OUTPUTS (Q, Q) VOH VOL VOH VOL ICC IEE (Note 4) (Note 4) -1.145 -1.935 550 4.3 12.3 7.0 20 -0.885 -1.145 -1.625 -1.935 550 5.0 13.8 7.0 20 -0.885 -1.145 -1.625 -1.935 550 5.6 15.2 7.0 20 -0.885 -1.625 V V mV mA mA
2
_______________________________________________________________________________________
LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators
DC ELECTRICAL CHARACTERISTICS--MAX9361
(VCC = 4.5V to 5.5V, VEE = -2.375V to -5.5V, GND = 0, outputs terminated with 50 1% to -2.0V. Typical values are at VCC = 5V, VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Notes 1, 2, 3)
-40C (SO) MIN TTL INPUT (D) Input High Current Input Low Current Input Clamp Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Differential Output Swing (VOH - VOL) POWER SUPPLY Power-Supply Current Internal Chip Current ICC IEE (Note 4) (Note 4) 3.0 9 7.0 20 3.5 10 7.0 20 4.3 11 7.0 20 mA mA IIH IIL VIK VIH VIL VIN = 2.7V VIN = VCC VIN = 0.5V IIN = -18mA -30 -10 -200 -1.2 2.0 0.8 -55 +30 +10 -30 -10 -200 -1.2 2.0 0.8 -61 +30 +10 -30 -10 -200 -1.2 2.0 0.8 -71 +30 +10 A A V V V TYP MAX MIN +25C TYP MAX MIN +85C TYP MAX
MAX9360/MAX9361
PARAMETER
SYMBOL
CONDITIONS
UNITS
LVECL/ECL OUTPUTS (Q, Q) VOH VOL VOH VOL -1.055 -1.875 550 699 -0.880 -1.055 -1.555 -1.810 550 691 -0.880 -1.025 -1.605 -1.810 550 677 -0.880 -1.605 V V mV
_______________________________________________________________________________________
3
LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators MAX9360/MAX9361
AC ELECTRICAL CHARACTERISTICS--MAX9360
(VCC = 3.0V to 3.6V, VEE = -2.375V to -5.5V, GND = 0, outputs terminated with 50 1% to -2.0V, input frequency = 1.0GHz, input transition time = 125ps (20% to 80%). Typical values are at VCC = 3.3V, VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Note 5)
PARAMETER Maximum Toggle Frequency Input-to-Output Propagation Delay Output Rise/Fall Time Added Deterministic Jitter Added Random Jitter SYMBOL CONDITIONS VOH - VOL 300mV VOH - VOL 500mV Figure 1 Figure 1 2Gbps 223 - 1 PRBS pattern (Note 6) 1.0GHz clock pattern (Note 6) 0C (SOT23) -40C (SO) MIN fMAX tPLHD, tPHLD tR , t F 1.0 0.85 300 70 97 TYP 3.0 1.5 800 150 MAX MIN 1.0 0.85 300 80 105 +25C TYP 3.0 1.5 800 150 MAX MIN 1.0 0.85 300 100 122 +85C TYP 3.0 1.5 800 150 MAX GHz ps ps UNITS
tDJ
43
70
43
70
43
70
ps(P-P)
tRJ
1.4
3.0
1.5
3.0
1.5
3.0
ps(RMS)
AC ELECTRICAL CHARACTERISTICS--MAX9361
(VCC = 4.5V to 5.5V, VEE = -2.375V to -5.5V, GND = 0, outputs terminated with 50 1% to -2.0V, input frequency = 100MHz, input transition time = 125ps (20% to 80%). Typical values are at VCC = 5.0V, VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Note 5)
PARAMETER Maximum Toggle Frequency Input-to-Output Propagation Delay Output Rise/Fall Time Added Deterministic Jitter Added Random Jitter SYMBOL fMAX tPLHD, tPHLD tR , t F CONDITIONS VOH - VOL 300mV VOH - VOL 500mV Figure 1 Figure 1 200Mbps 223 - 1 PRBS pattern (Note 6) 100MHz clock pattern (Note 6) -40C MIN 250 150 300 250 TYP 1300 500 561 340 900 1000 MAX MIN 250 150 300 250 +25C TYP 1300 500 583 342 900 1000 MAX MIN 250 150 300 250 +85C TYP 1300 500 607 353 900 1000 MAX UNITS MHz ps ps
tDJ
81
150
83
150
85
150
ps(P-P)
tRJ
4
10
4
10
4
10
ps(RMS)
Note 1: Measurements are made with the device in thermal equilibrium. Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. Note 3: DC parameters are production tested at +25C. DC limits are guaranteed by design and characterization over the full operating temperature range. Note 4: All pins are open except VCC, VEE, and GND. Note 5: Guaranteed by design and characterization. Limits are set to 6 sigma. Note 6: Device jitter added to the input signal.
4
_______________________________________________________________________________________
LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators
Typical Operating Characteristics
(MAX9360: VCC = 3.3V and VEE = -5V, VIH = 2.0V, VIL = 0.8V, TA = +25C, outputs terminated with 50 to -2V, input frequency = 1GHz, input transition time = 125ps (20% to 80%), unless otherwise noted.)
MAX9360/MAX9361
SUPPLY CURRENT vs. TEMPERATURE
MAX9360 toc01
OUTPUT AMPLITUDE vs. FREQUENCY
750 OUTPUT AMPLITUDE (mV) 700 650 600 550 500 450 400 350
MAX9360 toc02
20
800
16 SUPPLY CURRENT (mA) IEE 12
8 ICC 4
0 -40 -15 10 35 60 85 TEMPERATURE (C)
300 0 500 1000 1500 2000 2500 3000 FREQUENCY (MHz)
TRANSITION TIME vs. TEMPERATURE
MAX9360 toc03
PROPAGATION DELAY vs. TEMPERATURE
MAX9360 toc4
130
500 475 PROPAGATION DELAY (ps) 450 tPLHD 425 tPHLD 400 375 350
120 TRANSITION TIME (ps)
110
tR tF
100
90
80 -40 -15 10 35 60 85 TEMPERATURE (C)
-40
-15
10
35
60
85
TEMPERATURE (C)
_______________________________________________________________________________________
5
LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators MAX9360/MAX9361
Pin Description
PIN NAME SO SOT23 Negative Supply Voltage. Bypass VEE to GND with 0.1F and 0.01F ceramic capacitors. Place the capacitors as close to the device as possible with the smaller value capacitor closest to the device. LVTTL/CMOS Input for MAX9360. TTL/CMOS input for MAX9361. No Connect. Connect to GND. Ground Inverting Differential LVECL/ECL Output. Typically terminate with 50 resistor to -2V. Noninverting Differential LVECL/ECL Output. Typically terminate with 50 resistor to -2V. Positive Supply Voltage. Bypass VCC to GND with 0.1F and 0.01F ceramic capacitors. Place the capacitors as close to the device as possible with the smaller value capacitor closest to the device. FUNCTION
1
2
VEE D N.C. GND Q Q VCC
2 3, 4 5 6 7 8
1 3, 4 8 7 6 5
VIH
50%
50%
D tPLH Q SINGLE-ENDED WAVEFORMS Q VOH - VOL tPHL
VIL VOH
VOL
80%
VOH - VOL
80% 0 (DIFFERENTIAL)
20% Q-Q DIFFERENTIAL WAVEFORM tR
VOH - VOL
20%
tF
Figure 1. Input-to-Output Propagation Delay and Transition Timing Diagram
6
_______________________________________________________________________________________
LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators
Detailed Description
The MAX9360/MAX9361 are low-skew, single LVTTL/ CMOS/TTL-to-differential LVECL/ECL translators designed for high-speed signal and clock driver applications. For interfacing to LVTTL/TTL/CMOS input signals, these devices operate over a 3.0V to 5.5V supply range, allowing high-performance clock or data distribution in systems with a nominal 3.3V or 5.0V supply. For interfacing to differential LVECL/ECL output signals, these devices operate from a -2.375V to -5.5V supply. The MAX9360 is a 3.3V LVTTL/CMOS-to-LVECL/ECL translator that operates at typical speeds of 3GHz. The MAX9361 is a 5V TTL/CMOS-to-LVECL/ECL translator that operates at typical speeds of 1.3GHz. Both devices can be used to drive either LVECL devices or standard ECL devices with a negative supply range of -2.375V to -5.5V.
Traces
Input and output trace characteristics affect the performance of the MAX9360/MAX9361. Connect each signal of a differential output to a 50 characteristic impedance trace. Minimize the number of vias to prevent impedance discontinuities. Reduce reflections by maintaining the 50 characteristic impedance through connectors and across cables. Reduce skew within a differential pair by matching the electrical length of the traces. On the MAX9360, if the input edge rate approaches the electrical length of the interconnect, then controlledimpedance transmission lines should be used for the input traces.
MAX9360/MAX9361
Output Termination
Terminate outputs through 50 to -2V or use an equivalent Thevenin termination. Terminate both outputs and use the same termination on each for the lowest outputto-output skew. When a single-ended signal is taken from a differential output, terminate both outputs. For example, if Q is used as a single-ended output, terminate both Q and Q. Ensure that the output currents do not exceed the continuous safe output current limit or surge output current limit as specified in the Absolute Maximum Ratings table. Under all operating conditions, the device's total thermal limits should be observed.
Input
The MAX9360/MAX9361 inputs accept standard LVTTL/ TTL/CMOS levels. The input has pullup circuitry that drives the outputs to a differential high if the inputs are open.
Differential Output
Output levels are referenced to GND and are considered ECL or LVECL, depending on the level of the VEE supply. With GND connected to zero and VEE at -4.2V to -5.5V, the outputs are ECL. The outputs are LVECL when GND is connected to zero and VEE is at -2.375V to -3.8V.
Applications Information
Supply Bypassing
Bypass VCC and VEE to ground with high-frequency surface-mount ceramic 0.1F and 0.01F capacitors in parallel as close to the device as possible, with the 0.01F value capacitor closest to the device. Use multiple parallel vias for low inductance. TRANSISTOR COUNT: 330 PROCESS: Bipolar
Chip Information
_______________________________________________________________________________________
7
LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators MAX9360/MAX9361
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
SOT23, 8L.EPS
8
_______________________________________________________________________________________
LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX9360/MAX9361
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
SOICN.EPS


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